Dr. Ghada H. Ibrahim
Electronics and Engineering
Junior Fellow (Marie S. Curie FCFP)
November 2016 - October 2017
Ghada H. Ibrahim was awarded Bsc, Msc. and PHD from Faculty of Engineering, Cairo University, Electronics and Communications Department, 2000, 2005 and 2013 respectively. During this period, Ghada worked for R&D department, Bahgat group for MPEG decoder chip design, and then moved to Electronics Research Institute, Microelectronics department, where her research interests focused on RF circuit design for wireless sensor networks applications. Ghada joined MIMOS BHD, Malaysia from 2006 to 2008, where she contributed in the establishment of an RF team for the design of a WIMAX RF transceiver chip. She has more than 11 published papers in the field of RF circuit design. Her research interests spans RFIC design, printed electronics and MEMS design and microfabrication.
G. H. Ibrahim, A. Hafez, A. H. Khalil, “An Ultra Low Power QPSK Receiver Based on Super-Regenerative Oscillator with a Novel DigitalPhase Detection Technique”, International Journal of Electronics and Communications (AEUE), Elsevier, Volume 67, Issue 11, November 2013, Pages 967–974.
- Mostafa A. Elmala, Ghada H. Ibrahim, “Calibration Study of Dual-Band Weaver-Hartley Receiver Architecture”, Microelectronics Journal, Vol. 46, No. 6, June 2015, Pages 439–446.
- N. E. Elashkara, M. Aboudina, H. A. H. Fahmy, G. H. Ibrahim, and A. H. Khalil, "Memristor based BPSK and QPSK Demodulators with Nonlinear Dopant Drift Model", accepted for publication in Microelectronics Journal.
G. H. Ibrahim, A. Hafez, A. H. Khalil, H. A. Elsimary, “A 2.7 GHz Super-Regenerative Receiver Front-End for QPSK Modulated Signals”, CSNDSP 2012.
- Ghada H. Ibrahim, Amr N. Hafez, "An 8-PSK Digital Phase Detection Technique For Super-Regenerative Receivers", IEEE International Conference on Electronics, Circuits and Systems, ICECS 2015, 6-9 Dec. 2015, pp. 240-243.
Development of RFID circuit building blocks using an organic TFT transistor technology
Organic Thin Film Transistors (OTFT), has received considerable interest in the last decade due to the opportunities to fill current application gaps. OTFTs are aimed for applications requiring large-area coverage, structural flexibility, low temperature processing, and low cost. One of the most envisioned applications is the radio frequency identification (RFID) tag. Some of the required functional specifications in the targeted OTFT technology to suit the implementation of RFID circuit blocks are the operating speed, large current drive, low leakage and low threshold voltage.
Several RFID tags using OTFT devices were reported, either as complete tags, or some of their main building blocks, . However, targeted technologies suffered either large TFT length, high threshold voltage, high supply voltage or low fT , or combine several such performance issues.
The proposed OTFT technology in offers better performance measures where threshold voltages as low as 1 V and supply voltages as low as 3.3 V and reduced channel lengths to 0.8 µm, leveraging device's fT. This enables the implementation of RFID tags with better sensitivity and lower power consumption.
This project aims at designing basic building blocks of an RFID tag, including rectifier circuits and receiver part.